In this video, we use GPS signal to discipline the onboard clock used in PicoLTE.
Hello and welcome. In this video, we will use GPS signal to discipline the onboard clock used in PicoLTE.
PicoLTE combines Amarisoft’s LTE stack with Nutaq’s PicoSDR2x2-E to form a complete LTE testbed solution. Looking closely at the front panel of the PicoSDR, we can identify three main components, the embedded computer, the Radio420 FMC cards, and the PPS input. The embedded computer, which you can see here, consists of an Intel Core i7 processor with 8 Gig RAM and 64 GB Hard drive. As you can see from the picture, the front-end of the PicoSDR provides the users with an HDMI port, 2 USB 2.0 ports, a mini-usb port and a couple of Ethernet switch ports. Using these ports, users can connect various devices to the embedded computer, including a monitor, keyboard and a mouse. For PicoLTE, the embedded computer comes with Linux Ubunutu OS, running Amarisoft’s LTE stack. Amarisoft’s LTE stack enables us to run the eNodeB and the EPC on the same host machine, thus enabling us to implement a complete LTE solution over the embedded computer.
The PPS input, shown here, enables us to send a PPS signal to the FMC carrier’s FPGA to dynamically adjust the Radio420’s onboard voltage control oscillator, through a programmable DAC. This feature is especially useful when a GPS-disciplined clock is needed to drive the reference clocks. The onboard reference clock in Radio420 is tunable up to 30.72 MHz. As we will show later, a single line of code within Nutaq’s RF driver script enables and disables the PPS functionality.
The hardware setup used in this demo is shown here. You can see three LTE antennas, including two TX and one RX antenna. In this setup, an external GPS receiver, which you can see here, receives the GPS signal and provides the input PPS signal to the PicoSDR, which is then used to discipline the onboard reference clock.
At the other end of the GPS receiver, a co-axial cable with SMA connectors connects the GPS receiver with a GPS antenna mounted outside the building.
As you can see here, we are currently using the embedded computer which is running Linux Ubuntu.
Within Ubuntu, the first step is to launch the PCIe driver, which enables rapid data transfer between the embedded computer and the FPGA. The physical PCIe connection is routed internally within the PicoSDR.
Next, we will run the MME initialization script, which launches Amarisoft’s MME application. Following this, we will start the eNodeB.
Before starting the eNodeB, we have to change the PPS parameter within the RF driver script to true, as shown here. This change enables us to use GPS to discipline the onboard reference clock. For this demo, we are using LTE Band 2 with a downlink center frequency of 1.96 GHz.
The spectrum analyzer shows that the local oscillator frequency, which appears as the yellow peak, has drifted far from the desired center frequency. At this stage, we have stopped the eNodeB application so that we can clearly see the local oscillator frequency. Due to GPS based disciplining, we can now see that the LO gradually shifts towards the center frequency, with a refresh rate of one pulse per second.