Key Features

  • Up to 64 channels coupled to a large Virtex-6 FPGA
  • High Channel density yielding the lowest 125 MSPS cost per channel in the industry
  • Optional Intel Quad-Core i7 (embedded version)
  • 125 MSPS ADCs, 14 bit resolution
  • Phase aligned channels and phase coherent sampling
  • GigE and PCIe 4x high speed interfaces
  • AC-DC coupling options, single-ended or differential (on request)
  • Model-based design integration
  • Optional DACs, 1000 MSPS (Int. Modes), 16-bit
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PicoDigitizer 125PicoDigitizer 250
A/D & D/A Specifications
Number of A/D ConvertersUp to 64Up to 8
Maximum A/D Sampling Frequency125 MSPS250 MSPS
A/D Resolution14 bits14 bits
Number of D/A ConvertersUp to 3216
Maximum D/A Sampling Frequency1 GSPS *1 GSPS*
D/A Resolution16 bits16 bits
RF Specifications
Maximum BandwidthN/AN/A
Processor Specifications
FPGAXilinx Virtex-6
CPUExternal PC or embedded Quad-Core i7
Software Tools
Model-based design (Simulink)YesYes
Data Transfer
PCIeYes
GigEYes
Recording Capacity
Recording CapacityUp to 8 GBUp to 8 GB
Form Factors
Power ConsumptionTypical: 45 watts**Typical: 45 watts
Dimensions 48.05 (H) x 215.00 (W) x 290.00 (D)**48.05 (H) x 215.00 (W) x 290.00 (D)
WeightUp to 2.80 kg**Up to 2.80 kg

* With Interpolating Mode
** For the PicoDigitizer 125 32 ADC channels

Configurations

PicoDigitizer 126/16-E 125/32-E block diagram

PicoDigitizer 125/16-E  125/32-E

PicoDigitizer 125/16 125/32 block diagram

PicoDigitizer 125/16  125/32

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