The TitanMIMO-4 5G Massive MIMO testbed has PCIe switching (see Figure 1) which enables communication from the embedded CPU to every Perseus FPGA-based AMC as if they were in the same chassis. This PCIe switching is available due to the PCIe Expansion cards shown in the first chassis in Figure 2.

Massive MIMO Testbed PCIe System Control
Figure 1: PCIe Switching

The embedded CPU is used for controlling the system. Radio parameters such as frequency tuning or covered bandwidth can be set by the embedded CPU in that way. The PCIe communication links can also be used to record the content of the Perseus RAM memory to the solid state drive (SSD). This function could be used to record all RF channels at maximum RF bandwidth during a certain amount of time, which is useful for test vector validation. The data would first be transferred in real-time to the RAM, which would then offload the data to the SSD via the embedded CPU.  In the same way, the embedded CPU can upload data to the Perseus RAM memory using the PCIe. The PCIe has a theoretical speed of 10 Gbps and is able to sustain a tested efficient throughput of 6.4 Gbps. Since, for Massive MIMO data computation, the data aggregation isn’t using the PCIe backplane, the whole available throughput of the PCIe can be used for MAC access between the Perseus 6113 System Master and the embedded CPU for high speed data, while low data rate  commands are issued to all RF modules through the Perseus 6111 cards.

Figure 2: PCIe Expansion Cards