Combined together, Nutaq’s Model-Based Design Kit (MBDK) and Nutaq’s GNU Radio plug-in provide an integrated model-based design and development environment for software-defined radio (SDR) applications targeting mixed architectures (general-purpose processors and FPGAs). Nutaq’s model-based approach relaxes the requirements for staff to be qualified in VHDL and C software languages when working on wireless communication projects.
What is Nutaq’s MBDK?
The MBDK provides integration with Xilinx System Generator when developing for Nutaq’s SDR platforms, including the PicoSDR, the PicoDigitizer-250, and the µSDR Massive MIMO. The MBDK blocks are used alongside System Generator blocks in a unified Simulink environment. The Nutaq blocks support the SDR hardware while the System Generator blocks provide signal processing capabilities, from simple math or logical operators, to complex digital signal processing (DSP) algorithms (filters, CORDIC machine, FFTs, etc).
The resulting flow graph is then compiled to target the FPGA used in the platform.
What is Nutaq’s GNU Radio plug-in?
The GNU Radio plug-in, on the other hand, provides GNU Radio Companion integration for Nutaq’s SDR platforms. The Nutaq blocks are used alongside the other GNU Radio blocks in the unified Radio Companion environment. The Nutaq blocks support the SDR hardware while the GNU Radio blocks enable additional signal processing capabilities, including simple math and logical operators, complex DSP algorithms (filters, CORDIC machine, FFTs, etc), and signal generator/visualization tools. The GNU Radio libraries and free open-source repositories even include complete communication protocol stacks (e.g. CGRAN @ cgran.org).
The resulting GNU Radio flow graph is then compiled to target the embedded (or external) PC in the platform.
What blocks are available?
The Radio420M is a configurable dual-transceiver radio used by all of Nutaq’s SDR platforms and is based on the LMS6002D RFIC. On the PC side, the Radio420x blockset enables the configuration of the transceiver’s static parameters. The settings for data rate and bandwidth, transmit/receive (Tx/Rx) carrier frequencies, Rx RF bandpass pre-selection filters, and gain for the various amplifiers in the Tx/Rx chains are configured from a GNU Radio flow graph. Additionally, the Tx and Rx carrier frequencies and gain for one amplifier in the chain is configurable at run-time (gain and freq input ports).
On the FPGA side, the in-phase and quadrature components sampled from an Radio420M front-end enter the FPGA interleaved through the ADC MBDK blocks. The same block is used for the DAC side. The RX gain and Tx gain blocks allow for the centering of the external amplifiers in real-time from the FPGA logic. The LMS6002D block can be used in real time to overwrite the operating parameters of the LMS6002D RFIC from FPGA logic (to implement a frequency hopping scheme, for example).
The Custom Register block (in read or write mode) is used to control the FPGA user registers from a PC, or the PC user registers from the FPGA. The registers are typically used on the PC to control the real-time operating parameters of the FPGA design or to read out values from the FPGA at run time.
The RTDEx blocks provide seamless real-time data streaming between the PC and the FPGA.
The blocks can be configured on both FPGA and PC sides to use a Gigabit Ethernet (120 Mbps) or PCI Express (750 Mbps) interface for streaming media. This configuration is simply done from the blocks’ dropdown menus.