There is a plethora of languages that are spoken all over the world (Wikipedia estimates between 6,000 and 7,000), and the number of different types of signals an FPGA data acquisition system must be able to understand is probably just as large. Even putting visible light (images/colors) signals aside and focusing only on radio frequencies, we’re left with an incredibly large range of possibilities, covering everything from AM broadcasting to Ka band satellites and beyond (but let’s not go there, please). This topic alone is a challenge. However, the challenges don’t end there, since other factors also need to be considered, depending on the application.

This post will address the top two decision factors for selecting the proper I/O board for your application:

    1. Sampling speed
    2. Channel density

Sampling Speed and Analog Bandwidth

 

While sampling frequency may be only one out of a number of factors, it’s fair to say that it’s the starting point, central to the decision process that follows.

The following graphic illustrates the portfolio of I/O boards Nutaq offers as a function of signal bandwidth.  While this example is specific to Nutaq’s offering, the point we wish to make is that the sampling frequency (signal bandwidth) is a key deciding factor during the I/O selection phase.

portfolio of I/O boards Nutaq offers as a function of signal bandwidth

The relevant I/O board sampling frequency can quickly be pinpointed if you know the required signal bandwidth, and if we assume that we can use Nyquist’s formula:  take the desired signal bandwidth, multiply by two, and you’ve got the sampling speed.

Simple, right? Not so fast. Since more and more applications are now relying on powerful FPGA processors for their digital processing, ADC/DAC converters are increasingly used for directly sampling signals which are way above the Nyquist frequency (downsampling). This is where another key aspect comes into play (surprise!): the analog bandwidth.

Analog bandwidth is usually defined as the frequency range where your ADC/DAC will not attenuate the sampled signal by more than 3 dB. As an example, applications where an RF front-end brings signals to DC are not affected by this when sampled by a 105 MSPS ADC. However, modern digital communications systems, satellite communications, and radar applications are a few examples for which IF frequencies are often in the 70 MHz or 266 MHz range, if not directly sampled at 1 GHz or 2 GHz L-Band. Designers for such systems must pay close attention to analog bandwidth. This is where certain I/O boards can really help: those that support large signal bandwidths and that are designed to ensure maximum analog bandwidth and limited attenuation in the IF bands of interest.

 

Channel Density

 

When it comes to channel density, “more is better” seems to be the flavor of the day. MicroPET and PET-MRI systems want more channels to improve resolution; wireless protocols like LTE want more to enhance spectral efficiency and reliability; geolocation systems want more for better precision; cargo inspection systems need more to scan complete airplanes rather than individual boxes; and so on. Just as for your TV at home, it just always seems better to have more channels.

With applications now requiring up to thousands of channels, finding a solution that can easily scale up and deal with the extreme data throughput is highly important, especially since latency is always an issue at some point (there is only so much you can do as far as combining several dual input/output systems to meet your overall requirements).

Component manufacturers are greatly helping FPGA DAQ system manufacturers in that respect. By coming up with a highly-integrated, multi-channel ADC, Linear Technology® has helped companies like Nutaq aggressively decrease the costs for its FPGA data acquisition system offerings. This is of great interest for those applications which can now stream up to 32 channels into a single FPGA processing element (read this post to learn more). For applications requiring more signal bandwidth while still having several channels to cope with, a compromise between high sampling speed and high channel count must be made.

 

Conclusion

 

With such a wide variety of signals to interface and process, designers have to be very careful when selecting a proper ADC/DAC for their FPGA data acquisition system. Paying attention not only to sampling speed, but also to analog bandwidth and overall system channel density, is key to making sure the selected system is appropriate for an application.

The arrival of FMC modules greatly helped system designers try out various I/O types for their carrier boards. As more and more vendors adopt this form factor, front-end electronics users can expect to see new FMC modules being released that address smaller and smaller niche applications.