Introduction

Medical imaging and multi-channel communication systems require high-speed data acquisition over multiple channels. The high sampling speed and the high number of channels usually require a data acquisition board to work synchronously in order to ensure that all the data is acquired simultaneously. This can rapidly increase system complexity. Research centers developing these applications can lose a lot of time ensuring that their hardware setup properly synchronizes the data acquisition boards together.

One way to decrease system complexity is to replace the many data acquisition cards with fewer, higher density, cards. Nutaq’s MI125 FPGA mezzanine card (FMC) offers 16 channels at 125 MHz and uses an FMC low-pin-count connector. Using two of these cards in a double-stack configuration means 32 channels are now available with a single FMC high-pin-count connector.

Architecture

To synchronize the MI125's analog-digital converters (ADCs) together, the clock paths from the clock switch to the four ADC chips as well as the length of all the paths from the connector to the ADC analog inputs have been matched in length. This insures that all the ADCs will latch the data at the exact same moment.

In a 32-channel configuration (two MI125 16-channel cards in a double-stack configuration), the synchronization is more complex because a common clock must be shared between the boards. A clock switch distributes the selected clock to another clock switch on the same MI125 board and to the FMC extended connector. The second MI125 receives the clock from its FMC connector and routes it to its clock switch.

The architecture is shown in the following block diagram:

The green lines indicate that all the clock paths from the clock switch to the ADC chips (LTM9012) have the same length. The red line, which links the two clock switches of the same MI125, has the same length that sum of the blue lines, which link the clock switch of the first MI125 board to the clock switch of the second board.

The PCB of the MI125 boards has been designed to match all these path lengths, as well as the paths from the connector input to the analog-to-digital converters inside the LTM9012 die, with a path difference of less than 0.1 mm.

Measurement

In order to test the inter-channel synchronization of the MI125, we used the record example included in Nutaq’s ADP Software Suite. A 32-channel MI125 configuration set at 125 MHz is connected to a Perseus carrier board. To connect several channels to the same signal generator, Edge Rate Contact™ breakout SMA cables (shown below) and SMA Tee adapters have been used.

The recorded signal is transferred to the host computer for post-processing. The data processing is done in MATLAB. The cross-correlation of the different signal combinations has been calculated and the sampling skew values between the channels are obtained by finding the delay of the maximal value of the interpolated cross-correlation results.

The following table shows each channel's skew results compared to channel 1. The values are displayed in picoseconds and in percentages of the 125 MHZ sampling period.

Channel (compared to channel 1)

Skew (ps)

Skew (% sampling period)

2

60

0.8 %

3

23

0.3 %

4

166

2.1 %

5

44

0.6 %

9

32

0.4 %

13

92

1.2 %

14

199

2.5 %

15

-6

-0.1 %

16

234

2.9 %

17

142

1.8 %

21

55

0.7 %

25

67

0.9 %

29

78

1.0 %

30

100

1.3 %

31

37

0.5 %

32

126

1.6 %

The obtained results are very good when compared to the 8 ns sampling period. The worst entry is less than 3% of the sampling period.

However, the expected results should be better than these when we consider all the effort done to match the clock and data path lengths. After an investigation, it turns out that the Edge Rate Contact™ breakout SMA cables differ in length by a few centimeters (to find this, we tried different Edge Rate Contact™ breakout SMA cables and obtained different results each time). These length differences can easily generate skews of a few hundreds of picoseconds, as shown in our results.

Conclusion

The MI125 has been designed to have the lowest possible skew between ADC channels. This has been done by matching the clock and data paths for a 16-channel card as well as between two MI125 boards in a double-stack configuration. Our inter-channel skew measurements were limited by the Edge Rate Contact™ breakout SMA cables. This means that the real inter-channel skews of the MI125 cannot accurately be measured with the current setup.

Most applications can easily handle skews less than 33 times smaller than the sampling period at 125 MHz. For applications that are highly sensitive to skews, a custom board using the Edge Rate Contact™ connector with identical cable lengths should be designed to insure the same length between all signal paths.