In his blog series on massive MIMO, my colleague Ahmed Ouameur addresses the theoretical aspects of this multi-antenna approach. Massive multiple-input/multiple-output (MIMO) theory indicates that by using a large number of antennas (upwards of 50), the system’s transceiver performance is optimized. While such a number of transceivers offers great theoretical advantages, real-world implementation considerations can appear to pose insurmountable obstacles.
How can you prototype massive MIMO algorithms without developing your own 100×100 RF front-end, which would hardly be time or cost-effective? The solution: MicroTCA systems that provide the scalability for doing exactly that.
Start with 4×4
The MicroTCA specification was designed with system scalability at the forefront. To demonstrate this, and its importance in massive MIMO prototyping, I will use Nutaq’s TitanMIMO-4 product as an example. The 4×4 node within the TitanMIMO-4 provides the following resources to its user:
- 4 high-performance RF transceivers in an FMC form factor (Radio420M)
- 1 Virtex-6 FPGA board in an AMC form factor (Perseus611X)
- 1 embedded i7 CPU
- 1 MicroTCA.4 chassis
Starting massive MIMO prototyping on a small-scale system offers quite a few advantages:
- Gets the project under way with a fraction of the cost and de-risks most of the final system
- Allows the characterization of the RF front-end performance before acquiring all of the radio heads
- Enables familiarization with the software tools and the development flow (in this case, Nutaq’s model-based approach to FPGA programming)
- Enables the benchmarking of the system’s data interfaces (e.g. record, playback, and streaming capabilities)
The twin radio head on the 4×4 TitanMIMO-4 lets you start prototyping MIMO waveforms right away.
Move to 16×16
The next step in prototyping would be go to a 10-slot MicroTCA chassis (in this case, populated with 8 Perseus611x/Radio420m combos, thus creating a 32×32 MIMO system).
With this full chassis, still a fraction of the full system cost, the following development steps can occur:
- Familiarization with the inter-FPGA interfaces within the chassis. The challenge here is the aggregation of all the channels into one FPGA while maintaining inter-channel sample synchronization (I will describe the specifics of this synchronization in my next blog post).
- Upgrading the MIMO processing prototype from 4×4 to 32×32
Scale up to 100×100
The final step in system prototyping is to scale up to 100×100. At this point, all intra-chassis communication patterns have been developed. What remains to be designed is the inter-chassis communication.
The architecture of a 100×100 TitanMIMO-4 system would look like this:
- 3 MicroTCA.4 chassis
- A data switch, routing PCIe (or other protocol) data between each chassis
- A processing node (Perseus and PC)
In this system, all the channels are aggregated in the processing node FPGAs which host the massive MIMO processing. The data switch routes all channels to and from each processing node and each processing node’s FPGA can receive or transmit on all 100 radio channels.
Once all communications paths are instantiated and all channels are aggregated in the processing node FPGA, all that remains is the refining and tweaking of the massive MIMO algorithms.
As we have just seen, the scalability of MicroTCA systems allows an organic ramp-up of the material cost and the development of a massive MIMO prototype. However, there remains a lot of specific questions regarding massive MIMO system mechanics. In the remaining parts of this series, I will tackle the following subjects:
- Clock synchronization and disciplining
- Simultaneous configuration of RF transceivers
- Waveform recording and playback
- Real-time data aggregation