In previous blog posts, I described two communication protocols supported by Nutaq’s software tools: Gigabit Ethernet and PCIe. These protocols work great when exchanging data between a host computer and one or more Perseus advanced mezzanine cards (AMCs), with PCIe winning by a hefty margin in terms of throughput. While PCIe is the way to go for transferring large amounts of data between a host computer and a Perseus, it can’t link two Perseus AMCs together when no host computer is present . A host computer is necessary to perform the PCIe enumeration on the bus.
To provide a high throughput data exchange link between two Perseus AMCs that share a point-to-point connection, Nutaq is adding support for the Aurora communication protocol. It will be available in the next software release (6.4), due at the beginning of Q4 2013.
The Aurora core can be used with three separate port groups on the AMC backplane: ports 4–7, 8–11, or 17–20. To use the Aurora core, the ports require point-to-point connections through the backplane, as shown in Figure 1.
Figure 1: PicoSDR4x4 connection diagram
Figure 1 shows a typical use of the Aurora core in a PicoSDR4x4. The Perseus AMC receives data at a low rate and an algorithm creates a data stream with an upsampled rate. The data stream is sent to an I/O FPGA mezzanine card (FMC) and to another Perseus AMC through the Aurora bus. The data received by the second Perseus AMC is directly sent to an I/O FMC. Data received from the I/O FMC follows the same path in the other direction. The signal processing algorithm down-samples the data and sends it back through the GigE connection.
Nutaq’s Aurora cores always use all 4 lanes of a port group (4–7, 8–11, or 17–20). The throughput available when using a single core is 3.125 Gbps before the 8b/10b encoding, an effective throughput of 2.5 Gbps. Up to three cores can coexist as long as the ports of the Perseus AMC are not used by another core in the FPGA and that the ports are directly connected to another Perseus AMC through the backplane.
The user interface of the Aurora core is a simple FIFO with control signals. On the Aurora physical link side, the FIFO is 128 bits wide (4x lanes, 4 bytes per lane), but the user side is configurable with different element sizes (16, 32, 64, 128). Figure 2 shows snapshots of the Aurora RX and TX MBDK blocks, available in the 6.4 release at the end of September 2013. They give an idea of how simple it will be to interface custom logic with this core.
Figure 2: Aurora RX and TX MBDK blocks
The Aurora protocol enables you to exchange of large amounts of data between two Perseus cards in an AMC chassis when they are sharing point-to-point connections. Support for the Aurora communication bus is fully integrated into Nutaq’s MBDK. Up to three cores can be instantiated on specific ports over the AMC backplane (ports 4–7, 8–11, or 17–20). The three instances of the Aurora core can coexist, each enabling an effective data transfer rates of 2.5 Gbps between the two Perseus AMCs.